Continuous advances in the fields of digital and analog circuits (i.e., microprocessors and high-speed communications,) require very high levels of performance from their many constituent components. Of extremely high importance, is the integrity of their clock signals within these high performance circuits. System clock performance that was previously acceptable is now insufficient to support the high clock speeds of today's circuits.
In developing an analog or digital circuit, a reference clock signal is typically generated either externally from or internally within a circuit. Such a reference clock signal is then directed to various circuits or sub-circuits in order to provide clocked operations. Certain performance is required of a reference clock signal and is specified by a designer in order to provide optimal operation of a circuit. The reference clock signal, in propagating through many circuits and sub-circuits, can be subjected to noise, including externally and internally generated electromagnetic interference (EMI) and radio frequency interference (RFI) noise. Moreover, rising and falling edges of a reference clock signal can deteriorate as they propagate through circuits and sub-circuits. As a clock signal propagates through circuits and sub-circuits, the clock signal becomes delayed and, therefore, lags the reference clock signal.
As mentioned, specifications are placed on a reference clock signal, however, clock signals received at a given point must also meet certain specifications that account for a certain amount of degradation while still allowing for an operational circuit. One of the specifications placed on a clock signal is a maximum allowable jitter. Jitter can be understood as short-term variations of the significant instants of a digital signal from their ideal positions in time. Significant instants include, for example, rising and falling edges of a square wave clock signal. Short term variations of these edges can be measured in time. For example, where a rising edge is expected to occur at time E(t), but instead occurs a time t1 after E(t), the rising edge is said to be delayed by a time Δt1 (=t1−E(t)). Where the rising edge instead occurs at a time t1 before E(t), the rising edge is said to lead by a time Δt (=E(t)−t1). Similar measurements could be made for a falling edge of a clock signal or other significant instant on a clock signal. Jitter can also be measured in unit intervals and phase (or degrees). With regard to unit intervals, a single unit interval is one cycle of clock signal that is normalized to the clock period such that jitter expressed in unit intervals provides a measure for the magnitude of the jitter as a fraction of one unit interval. Jitter expressed in phase describes a measured clock signal with regard to a phase offset from a reference clock or an expected clock occurrence. One of skill in the art will understand that there exist other measures of jitter. It is therefore an object to the invention.
In measuring jitter, prior art methods have used an external oscilloscope connected to an integrated circuit. Preferred prior art methods use a digitizing oscilloscope to record and view a reference clock signal and an input clock signal simultaneously. While viewing these signals, a user is then able to compare the difference in time of these signals. The user can repeat this method many times to get an idea of how significant instants on an input clock signal vary over time and thus, the process is very time consuming. This prior art method is very cumbersome in that a large and expensive oscilloscope is required. Moreover, this prior art method is typically used in a lab environment and does not lend itself to use at other locations where a failing integrated circuit may be located.